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Pervasive Intelligence uses machine learning (ML) to improve each step of the chip development process. For example, a simulator uses AI/ML to generate more of the constrained-random stimulus that has been most effective at improving coverage results and therefore verification effectiveness. In the implementation domain, a logic synthesis or layout tool both explores the design space more rapidly and uses AI/ML to generate results observed to produce the best performance, area, and power (PPA).

Individual tools working on individual designs are valuable, but the full benefits of Pervasive Intelligence require two additional capabilities. First, tools must be able to ¡°warm start¡± using results from previous designs on the same project. For example, after one block has been optimized and completed, its knowledge database can be leveraged by implementation tools for a second block in the same chip since the target technology is identical and design style is similar. Further, learnings from one project can often be applied to derivative projects.

Collaboration between EDA tools is the other essential ability. Via a shared knowledge database, learnings can be passed both forward and backward in the chip development flow. For example, a layout-aware logic synthesis tool can be much more effective if it has access to the results from the layout for previous runs of a block or other blocks in the same design. Similarly, implementation and optimization tools benefit from the analysis performed on actual chips in a wide range of field deployment scenarios.

Pervasive Intelligences is related to artificial intelligence (AI), but it is a much broader concept. Any individual EDA tool can use AI techniques such as ML for better or faster results, but this is not pervasive. Just connecting a series of such tools in a development flow does not qualify. Pervasive Intelligence requires true collaboration between the tools in the flow, including sharing of data useful when passed from one tool or step to another.

The other main distinction between the terms is that Pervasive Intelligence leverages human experience as well as previous results of AI engines. There are multiple steps in the flow where EDA tools can leverage templates from human experts and factor that experience into analysis and optimization. Pervasive Intelligence is a complete solution, spanning the entire silicon lifecycle and leveraging all manner of intelligence available.

The goal of Pervasive Intelligence is to produce results unattainable through traditional manual methods. These results may entail better silicon or a more efficient development process, and often both. Specific benefits include:

• A more optimized silicon design, as measured by the traditional PPA metrics: faster operating frequency, smaller die area, or lower power
• A better silicon design in terms of manufacturability, functional safety, security, or other important metrics beyond PPA
• A shorter development schedule to reduce time to market (TTM), beat competition, and maximize the chances for product success
• Fewer human and computing resources to decrease project development expenses and maximize profit
• Better verification, validation, and signoff to eliminate chip turns that delay TTM and increase project cost

Chip developers do not have to make any special effort to apply Pervasive Intelligence to their designs and reap the benefits. They must choose an EDA vendor that both incorporates AI techniques within their tools and links their tools together in a collaborative flow. Once they have the power of Pervasive Intelligence available, they simply establish guidelines for developers to enable the technology and share databases across steps within projects and across projects when appropriate.