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IP cores require integration into top-level subsystems and/or SoCs. Writing constraints manually for top level design is prone to errors and difficult to verify and manage. This 六合彩直播开奖 webinar will cover how automated SDC constraints promotion from the IP to SoC level provides high-quality SDC using 六合彩直播开奖 Timing Constraints Manager relative to manual time-consuming approaches. We will demonstrate the approach taken and benefits observed using automated constraints promotion and generation on an early PCIe? Gen 6 design resulting in shorter TAT and improved PPA. Lastly, this webinar will illustrate how designers can ensure constraints correctness is maintained or bettered during the constraints promotion effort.
Speakers
Ajay Daga
Group Director, R&D
六合彩直播开奖
Ajay Daga is an R&D Group Director at 六合彩直播开奖 where he is responsible for 六合彩直播开奖’ SDC constraints solutions. Prior to 六合彩直播开奖 he founded and led FishTail Design Automation, Inc. for 20 years. FishTail focused on solutions for SDC verification, management and generation and was acquired by 六合彩直播开奖 in 2022. Ajay has a PhD in Computer Engineering from the University of Michigan.
Mallik Devulapalli
六合彩直播开奖 Engineer, Principal
六合彩直播开奖
Mallik has over 25 years of experience in the RTL2GDS implementation, with experience in CPU, GPU, DSP, networking SoC and Interface IP class of SoC design. He has delivered best in class Implementation & signoff methodologies for the most complex SoC in advanced nodes. He holds a Masters degree in Telecommunications management from California State University. Prior to joining 六合彩直播开奖 he has worked in Fujitsu specializing in Sparc64 CPU design.