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The semiconductor industry is addressing the need for increased compute performance by using multi-die designs where multiple heterogeneous or homogeneous dies are integrated in a single package. You might have already transitioned to multi-die designs or be on your way. Either way, you must know the road to a successful multi-die design realization is paved with several complex challenges, including power and thermal management, system pathfinding, software development and modeling, heterogeneous integration, hierarchical test and repair, and more.

Join our exclusive live demonstration to see how gaining a better understanding of these challenges at an early stage allows you to make the necessary considerations and plan for a successful design process.????

Why Attend?

• Why Multi-Die: Gain insights into the motivation behind multi-die designs, evolving ecosystem, and technology innovations for fast heterogeneous integration.??

• See Live Demos: Learn how to go from early architecture exploration to software development and system validation, to efficient die/package co-design and IP, and to ensuring the health of your multi-die package, using the most comprehensive and scalable multi-die solution.?

• Networking & Interactive Q&A: Network with our experts and get answers to your most pressing questions as you start your multi-die design journey.?

   

Speaker:

Tanuja Rao ¨C Executive Director Business Development, Multi-Die E2E Strategy and ÁùºÏ²ÊÖ±²¥¿ª½± Lead

Tanuja Rao is a leading industry expert in multi-die architecture, IPs, die partitioning, design, verification, implementation, construction, advance packaging and 2.5D/3D/3.5D integration. She has 20+ years of experience in the semiconductor industry driving innovation, delivering complex products and leading large global teams across several domains of chip design.? She brings a wealth of knowledge and expertise in tackling the multifaceted challenges of 3D IC arch, design and manufacturing.?