ÁùºÏ²ÊÖ±²¥¿ª½±

Today marks the second anniversary of the United States¡¯ landmark CHIPS and Science Act. This important bipartisan law¡ªas well as the dedicated implementation by the White House, the Department of Commerce, and many other entities including state and local partners¡ªis a historic investment in the American semiconductor industry ecosystem. 

We are proud to support the investments spearheaded by the CHIPS Program Office to-date, including the development of semiconductor manufacturing in the U.S. for customers and CHIPS Act grantees such as GlobalFoundries, Intel, Micron, Polar Semiconductor, Samsung, SK hynix, and TSMC. Semiconductor foundries count on ÁùºÏ²ÊÖ±²¥¿ª½±, qualifying our mission critical IP and EDA software so that our mutual customers can manufacture with confidence. 

The next chapter of the CHIPS Act is underway to allocate a substantial $13 billion in CHIPS research and development (R&D) funds and will determine the U.S.¡¯ future as an innovation hub and leader in the global semiconductor industry. ÁùºÏ²ÊÖ±²¥¿ª½± CEO Sassine Ghazi commented on the significance of CHIPS Act R&D initiatives saying, ¡°As progress on manufacturing projects continues, we must also fortify this foundation with the essential research and development needed to fill fabs. R&D is the lifeblood of the semiconductor industry, and investments in this area will deliver step-function gains that benefit the entire ecosystem to overcome unprecedented design and manufacturing complexity, as well as foster the next generation of innovators.¡± 

We commend the Department of Defense and the Microelectronic Commons, as well as the Department of Commerce and NATCAST, as they establish the National Semiconductor Technology Center (NSTC). CHIPS R&D efforts are moving forward with a commitment to strengthen U.S. semiconductor industry R&D capabilities in key areas, such as: 

• Industry Design and Manufacturing Standards: We know through our work designing for PCIe, UCIe, ISO, and many other standards that industry interoperability is critical to mitigate design and manufacturing complexity. The Chips Metrology Program will support alignment research and projects to continue unincumbered innovation at scale.

• Multi-die Design: The promise of modular, chiplet-based designs to enable trillion-transistor systems is on our doorstep. ÁùºÏ²ÊÖ±²¥¿ª½± is helping lead this transformation with breakthrough solutions such as 3DIC Compiler and 3DSO.ai, which makes the work of the CHIPS Manufacturing USA Institute especially exciting.

• Digital Twins: We applaud the establishment of the CHIPS Digital Twins Manufacturing USA Institute as part of the CHIPS National Advanced Packaging Manufacturing Program (NAPMP) to prioritize advancements in this area that will benefit chipmakers as well as systems companies. 

• Cloud-enabled Semiconductor Design: Many CHIPS Act R&D initiatives will need easy access to advanced design enablement solutions. ÁùºÏ²ÊÖ±²¥¿ª½± is tackling this challenge for the California Defense Ready Electronics and Microdevices Superhub (DREAMS) coalition, the first hub to build out its design enablement for the Department of Defense (DoD) Microelectronics (ME) Commons. The DREAMs team selected ÁùºÏ²ÊÖ±²¥¿ª½± cloud-based EDA technologies to accelerate their ramp-up and progress prototyping RF technologies and processes for 5G/6G and other projects. ÁùºÏ²ÊÖ±²¥¿ª½± is also eagerly awaiting details on a new design enablement gateway to be established by NATCAST.
• Workforce Development: We cannot overlook the critical importance of workforce development efforts that go hand-in-hand with semiconductor technology innovation. We applaud the recently launched NSTC Workforce Partner Alliance (WFPA) program and enthusiastically continue our work supporting the Purdue University Summer Training, Awareness, and Readiness for Semiconductors (STARS) program as well as managing the ME Commons CASCADE (Commons-Accelerated Silicon Crossroads Apprenticeships for Demands in Engineering) program also with Purdue University to offer training, mentorship, and career support to students, veterans, and historically underrepresented communities to strengthen the domestic microelectronics landscape.

ÁùºÏ²ÊÖ±²¥¿ª½± is deeply committed to supporting semiconductor R&D initiatives, powering innovation today that ignites the ingenuity of tomorrow. With approximately 30 percent of our annual revenue invested in our own R&D, ÁùºÏ²ÊÖ±²¥¿ª½± has extensive expertise bridging fundamental research and industry to deliver breakthrough solutions that propel our customers and the industry forward. For example, the ÁùºÏ²ÊÖ±²¥¿ª½± Generative AI Center of Excellence pioneered AI for chip design with the launch of our DSO.ai solution almost five years ago and the industry¡¯s first generative artificial intelligence (GenAI) capability for accelerating chip design just last year. 

In addition, as a preferred technology partner for workforce development programs, ÁùºÏ²ÊÖ±²¥¿ª½± Academic and Research Alliances (SARA) supports programs with 230 U.S. academic institutions across 46 states to address the industry¡¯s By providing university students and professors with access to a curriculum, tools, and IP, we are helping to create a sustainable pipeline of trained semiconductor workers to meet next-generation challenges and demands.

Semiconductors are a catalyst for technology advancements across all sectors¡ªfrom 5G/6G and edge/IoT, to AI, HPC, quantum technology, and automotive. These industries require increasingly advanced chips for increasingly complex systems, making it is essential for the U.S. to continue investing in both semiconductor manufacturing and R&D capabilities. We look forward to continuing to work with policymakers, academic institutions, and our partners and customers as R&D initiatives take center stage to strengthen the U.S.¡¯ semiconductor industry leadership.