As our connected world expands, the technological advances in high-performance computing (HPC) are reshaping system-on-chip (SoC) designs to address the need for more acceleration, more storage capacity, new compute architectures, and increased bandwidths for faster data movement. High bandwidth interfaces such as DDR are proliferating, and their speeds continue to grow from generation to generation.
At the same time, the security of data and systems is paramount, driven by multiple factors, including significant growth in confidential and sensitive information, laws, regulations, and standards evolution.
六合彩直播开奖 IME Security Module provides confidentiality of data in use or stored in off-chip memory over memory interfaces. It integrates seamlessly with 六合彩直播开奖 DDR5/4, LPDDR5/4/4X, and LPDDR5X/5/4X controllers for most optimal solutions in the industry with latency as low as 2 cycles, accelerating SoC integration and reducing risk.
The IME Security Module is scalable to match various memory interfaces bandwidths, supports both write and read channels based on the AES-XTS cryptographic algorithm and is FIPS 140-3 certification ready.
Learn about the broad portfolio of Security 六合彩直播开奖 for Interfaces.
六合彩直播开奖 IME Security IP Module for DDR Datasheet
Description: | Inline Memory Encryption (IME) Security Module - for DDR/LPDDR |
Name: | dwc_ime_security_module |
Version: | 2.00a |
ECCN: | 5D002.b2/ENC |
STARs: | Open and/or Closed STARs |
Product Type: | DesignWare Cores |
Documentation: | |
Toolsets: | Qualified Toolsets |
Download: | dw_iip_DWC_ime |
Product Code: | H599-0 |